Special Function Registers of the PIC Microcontroller

Think of a register as a manager in a factory and you are the owner of the factory. In a factory there must be many managers to manage different stuff. But they do what you want them to do. You can tell the manager who is in charge of some equipments to turn off them for sometime or anything. In our case the Special Function Registers (SFR) do the same thing. These control the operation of the microcontroller, and still you are the boss.

As you can see in the image to the right, the data memory (SRAM) of the PIC Microcontroller is divided to two banks. Why Banks? Larger memory is, the larger the address bus needed. Divide memory to 2 banks, smaller address bus now can be used. (7bit address). The 8th bit will be the bank bit itself. You will have to change the bank(0 or 1) when you want to change the microcontroller operation because the SFRs on bank1 are accessible only when you are in bank1. Likewise SFRs in bank0 only accessible when you are in bank0. Whenever you want to reach bank 1, you must set the bank bit to 1. How to do that is coming up.

The memory is partitioned into two areas. The first is the Special Function Registers (SFR) area, while the second is the General Purpose Registers (GPR) area.

A SFR is a location of the RAM that acts like a switch for a specific microcontroller operation. That means each of the 8bits of a SFR is linked to a microcontroller peripheral. For example TRISA and TRISB SFRs control what pins of the PORTA are input, what pins are output. Each SFR has an address. Memory is not a 1 single block. Its divided into many blocks. So each block has an address. You must call the address of the block in order to change the value in it. These addresses are clearly shown in the datasheet (00h to 0Bh and 80h to 8Bh). As you can see in the image PORTA has the address 05h (you write “h” to make the compiler know that you are giving a number in hexadecimal). This address might change microcontroller to microcontroller. So you must refer the corrosponding data sheet. If you want to make any change to the state of the pins (logic high, logic low or to monitor the pin) you must call this address. You change these states by setting a bit to 1 or 0 in the corresponding SFR. For example if you wanted to set RA0 pin of PORTA as an input, you must set bit 0 of TRISA to 1. If you wanted make RA0 pin of PORTA as an output, you must set bit 0 of TRISA to 0. Anyhow if you wanted to do any of this, first you must change the bank to bank 1 because TRISA is only accessible in bank1. So there’s a switch to change the bank too. It’s the bit 5 of the STATUS SFR(03h). You must set the bit 5 of the status SFR to 1 in order to get to bank1. Then you can set it back to 0 to get back to bank0. You can change these anywhere in the program.

Let’s say you wanted to make all pins in PORTA as inputs. So you use a code like this. Refer PIC Microcontroller Programming in Assembly Language to understand what each instruction does.

BSF      03h, 5               ; setting the bit 5 of the status SFR to 1 (in order to get to bank1)

BSF      85h, 0               ; setting bit 0 of TRISA to 1

BCF      03h, 5               ; setting the bit 5 of the status SFR to 0 (in order to get back to bank0)

Suppose you wanted to make RA1 as a output. Here’s the code.

BSF     03h,5                ; setting the bit 5 of the status SFR to 1 (in order to get to bank1)

BCF     85h,1                ; setting bit 1 of TRISA to 0

BCF     03h,5                ; setting the bit 5 of the status SFR to 0 (in order to get back to bank 1)

The default bank state in PIC microcontroller is bank 0. So if you tried to call TRISA at the beginning of the program without changing to bank1 it will generate a compile error.

GPRs are not connected to any microcontroller peripheral and are used for variables you define. Let’s say you want to count how many people go through a door. You can do this easily with incrementing a GPR. These are also used for making Delays. Dont read about delays just now. PIC 16f84a has 68 GPR (SRAM) – locations 0Ch to 4Fh. More info on counters will be on a later article.

50h to 7Fh and D0h to FFh are not mapped (the gray area at the bottom). If you read 32 bit – 64 bit Related to Hardware and Software you might have some idea on address busses. Soo wider the address bus is, the more memory you can address. The reason for unmapped memory locations in 16F84A is that it has more addresses than it’s onchip memory.

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