Verilog HDL

Hardware descriptive languages are useful when describing circuits consisting thousands or more transistors (LSI, VLSI integration). As we can describe a sequential program with C, hardware can be described with a hdl.

Design Process of Hardware

  • Abstraction of the intended design
  • Schematics and hardware description

languages

  • Simulation
  • Synthesize a netlist
  • Input the synthesized netlist to the tools that

build the final device.

Verilog Simulation tools

  • Xilinx (Windows)
  • Icarus Verilog (Linux)

Hello World!

module main;
initial
begin
$display(“Hello, World”);
$finish ;
end
endmodule

Compiling using iverilog (icarus verilog)
% iverilog -o hello hello.v

Executing
% vvp hello
Hello, World

Examples can be found in following links,

http://www.asic-world.com/verilog/veritut.html

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